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Total : 150/150 IP Cores

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150

2.6W Class-D Audio Amplifier

KC015H0207 | 2012-01-26


This IP is a highly efficient filter-free class-D audio amplifier of delivering 2.6W of continuous average power to a 4Ω from 5.5V supply in a bridge tied load (BTL) with less than 1% THD+N. It pro……more

- Supply voltage from 2.5V to 5.5V - High efficiency up to 90% - Under 3mA quiescent current - 0.01% THD+N performance - ……more

149

20~500 MHz Frequency Synthesizer PLL

KC050H0190 | 2011-11-23


This PLL is frequency synthesizer for generating 20~500MHz clock. It contains 5bit pre-divider, 8bit main-divider, and 2bit post-divider, phase-frequency detector, charge-pump, VCO, lock detector and ……more

- 0.18㎛ 1P4M Magna-chip CMOS technology - Single power supply 1.8V - VCO Operating frequency range : 150~500MHz - Built-in lo……more

148

MIPI DSI (Display Serial Interface)

KC115S0185 | 2011-09-27


This is a MIPI DSI IP which supports MIPI Alliance Specification D-PHY 1.0 complant PPI interface. It supports max 4 data lane & clock channel and function of error correction and CRC mode.…more

- D-PHY interface . MIPI Alliance Specification D-PHY 1.0 compliant PPI interface - Number of Lane . Max 4 data Lane & Clock ……more

147

2D to 3D Real Time Image Converter

KC115H0184 | 2011-09-27


This is an 2D to 3D real time image convertor IP which supports up to 1920x1080P@60Hz, and uses the optimized architecture inside for low power consumption and small gate size. It supports up to 160MH……more

[General] - Hardwired 2D to 3D Real Time Image Conversion - Embedded 3D formatter function - Up to 160MHz Dual channel LVDS Recei……more

146

5V, 16-ch, 12-bit 1MSPS ADC

KC050H0182 | 2011-09-20


This IP is gds completed and was verified by simulation. Silicon validation will be in December 2011. This IP is a 12-bit, 1MSPS, Analog - to - Digital Converter which is implemented with Magnachip 0.……more

- 1P4M CMOS Technology - 12-bit resolution - 1MHz Conversion rate - 4.5V to 5.5V Analog Voltage - 1.62V to 1.98V Digital V……more

145

128-bit AES

KC069S0183 | 2011-09-09


This is an 128-bit AES IP which supports both of encryption and decryption, and uses the optimized architecture inside for low power consumption. It supports all of the operation modes defined in NIS……more

- Compliant with FIPS-197 - Encrypts or Decrypts AES in 128-bit key size - Support for 128-bit key size - Built-in key expansion ……more

144

FPGA EISC Platform

KC005S0180 | 2011-08-23


FPGA EISC Platform is an small and energy-efficient processor for applications requiring better responsiveness and better processing power with less energy consumption. FPGA EISC Platform is provided ……more

Low-power 32-bit EISC Microprocessor - AE32000C Tiny - 8KB 2-way Instruction Cache Embedded Memory - 8KBytes Internal I……more

143

AES-128

KC005S0181 | 2011-08-23


The AES is developed as a solution for the weakness of DES(Data Encryption Standard). 128-bit key can be supplied by BUS interface or the hash function block which is supplied optionaly. The input dat……more

- Advanced Encryption Standard, Rijndael - 128bit AES block encryption - Interface to the hash function IP (option) - Choice betw……more

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Total : 33/33 IP Cores

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33		High Throughput and Reconfigurable LDPC Decoder

KU125S0192 | 2012-02-14


This IP provides high throughput and reconfigurable LDPC decoder architecture for high speed wireless communications. LDPC decoder IP can support various codeword block lengths and coding rates by ope……more

- Fully Parallel architecture - Sum-Product algorithm with broadcasting technique - Combined variable and check node processor with low ……more

32		500Mbps 2x2 MIMO Decoder

KU128S0194 | 2012-01-31


The area-efficient symbol detector is proposed for multiple-input multiple-output (MIMO) communication systems with two transmit and two receive antennas. The proposed symbol detector can support both……more

- Device : Xilinx Virtex-5 LX330 FF1760 - Maximum Operating Speed : 100 MHz - Slices : 136857 - DSP48s : 104…more

31		4-channel 64~2048-point FFT processor

KU128S0193 | 2012-01-31


The area-efficient FFT processor is proposed for MIMOOFDM ased SDR systems. The proposed scalable FFT processor can support the variable length of 64, 128, 256, 512, 1024, 1536, and 2048-point, which ……more

- 46.9-dB SQNR for data-path - 90MHz clock frequency - Slices : 26233 - DSP48s : 48 - Memory : 393.22Kbits…more

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