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IP Open Network KIPEX - Newsletter September 29, 2017 Vol.74 | 2017-10-10



Vol.74 2017.09.29

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Hot IP

  High Speed High Resolution 640MHz 12bit Sigma-Delta ADC

This IP is composed of two matched fully differential, high-speed, low-power delta sigma ADC cores, designed in CMOS 65nm LP technology.

  0.18um Power-On Reset  

The Power-on Reset generates a reset pulse as power supply. The power supply reaches a specified voltage level, VTR, it will create the reset signal or pulse width signal. By this reset signal, all the logic end up initializing its known state...

  1.8V LDO

1.8-V 500-mA Linear Regulator

  150mA Low Dropout Voltage Regulator

This IP is a linear voltage regulator for embedded application that requires an internal power supply than the external power supply voltage. It is operated by 3.3V and delivers a steady output of 1.8V +/- 10%. The regulator is equipped with bandgap voltage reference and tunable output voltage circuit.

  High Dynamic Range IP for DDI & AP

High Dynamic Range algorithm helps to make input image have the best contrast image. After checking the brightness value information, this algorithm increases contrast value in the much informed area. This can increase the visibility of output image compare to input image.